Advance Operating System Quiz

1. Which of the following is the reason that the least recently used (LRU) algorithm is usually not used as a page replacement algorithm?

A. Other practical schemes such as MIN do a better job.

B. LRU requires knowledge of the future to work correctly.

C. LRU is too inefficient to implement in practice.

D. The Clock algorithm always outperforms LRU.

 

2. Which of the following are shared between threads in the same process?

A. registers

B. page table

C. stack

D. stack pointer

E. None of these are shared

 

3. The IP service model guarantees which of the following?

A. The contents of a packet will not be corrupted

B. That at least one copy of a packet will arrive at the destination

C. That no more than one copy of a packet will arrive at the destination

D. That packets sent in order will be delivered in order

E. None of the above

 

4. Using the SCAN (a.k.a. elevator) disk scheduling algorithm, determine how far the disk head moves servicing the following outstanding requests: 150, 19, 20, 900, 99. Assume the disk's head is currently over track 100 and moving toward smaller track numbers.  Also, assume that all of these track requests have already been received.

A. 962 tracks

B. 1064 tracks

C. 1681 tracks

D. 1863 tracks

E. None of these are true

 

5. If a process has allocated every 1024th virtual page (e.g. it has allocated virtual pages 0, 1024, 2048, 3072, 4096, 5120 ... 1024000), which one of the following page table schemes will use the LEAST amount of memory?

A. A flat page table

B. A two-level page table with 1024 first level entries

C. A two-level page table with 2048 first level entries

D. An inverted page table

E. Each of the above page table will use exactly the same amount of memory

6. Making no assumptions about the processes being scheduled, which of these scheduling algorithms will prevent starvation?

I. First Come First Served  (doesn’t work if a job runs forever—infinite loop)

II. Round Robin

III. Priority

 

A. I

B. II

C. I & III

D. I, II, & III

 

7. Consider a group of RAID4 disks. This group has four data disks and one parity disk. Which of the following are true?

I. Any data disk but NOT the parity disk can be reconstructed from the other four

II. The parity disk must be read whenever one of the data disks is read

III. The parity disk must be written whenever one of the data disks is written

 

A. III

B. I & III

C. II & III

D. I, II, & III

E. None of the above

 

8. Which of the following is true about two threads running in the same process?

A. One thread can both read and write another thread's registers

B. One thread can change the other thread's program counter

C. One thread can neither read nor write the other thread's stack

D. One thread can both read and write the other thread's stack (there is no address space protection between threads in the same process)

 

9.Which disk block allocation scheme will require the most I/O operations for random access to a large file?

A. Indexed allocation

B. Linked allocation

C. Contiguous allocation

D. I-node allocation

E. Each scheme requires approximately the same number of I/O operations

 

10. Which of the following does NOT solve deadlock?

A. Acquiring all resources before using any of them   (this is not acquiring all resources or no resources.  This doesn’t eliminate hold and wait)

B. Only acquiring resources in order based on a predetermined priority

C. Acquiring a maximum of one resource at a time (can’t have hold and wait if only have one resource)

D. If a resource is unavailable, releasing all resources and waiting for all required resources to become available

11. What is the primary reason that a translation lookaside buffer (TLB) is used?

A. A TLB ensures that a process does not access memory outside of its address space

B. A TLB makes translating virtual addresses to physical addresses faster

C. A TLB allows multiple processes to share the L1 cache

D. A TLB makes translating virtual addresses to physical addresses possible

E. None of the above

 

12. Which of the following is not a solution to thrashing?

A. Running fewer processes

B. Increasing the speed of the CPU

C. Increasing the size of physical memory

D. Rewriting programs to have better locality

E. These all solve the problem of thrashing

 

13. Which of the following is NOT a way to make file systems faster?

A. Put parts of a file on many different tracks so part of it can be accessed no matter where the disk head is

B. Cache frequently used blocks in memory so they can be accessed at memory speeds instead of disk speeds

C. Use a disk scheduling algorithm to minimize the distance between seeks

D. Put frequently used files or directories near the center of the disk so on average they won't be far from the read head

E. All of these will make a file system faster

 

14. Which of the following is true about base and bounds registers?

I. They offer protection between processes

II. They lead to internal fragmentation of physical memory

III. Once a process has been started at a given memory location, it cannot be moved to another location

 

A. I

B. II

C. I & II

D. I, II, & III

E. None of the above

 

15. Which of the following can I do without knowing your private key?

A. Pretend to send a private message on your behalf

B. Decrypt messages that were intended for only you

C. Send you a message that only you can read

D. Digitally sign a message on your behalf

E.  I must know your private key to perform all of these operations

 

16. Public/private key encryption is usually avoided because

A. It is much slower than symmetric key encryption

B. It is only useful when encrypting large amounts of data

C. It is not as secure as symmetric key encryption

D. It cannot be used unless two parties can exchange their private keys securely

E. None of the above

Suppose a system has only three physical pages. Given the following sequence of virtual page references, determine the number of page faults that are required. Initially, assume that the physical pages are not being used by any virtual page.

1 2 1 1 3 2 1 4 3 1 1 2 4 1 5 6 2 1

17. Using the first in first out (FIFO) replacement policy

A. 9

B. 10

C. 11

D. 12

E.  None of the above

 

18. Using the least recently used (LRU) replacement policy

A. 9

B. 10

C. 11

D. 12

E.  None of the above

 

 

19. Which of the following is NOT a use of TCP sequence numbers?

A. To ensure that data is delivered to the application in the order it was sent

B. To distinguish duplicate packets

C. To determine how much data is left to send

D. All of these are uses

 

20. Which of the following is NOT a property of Ethernet?

A. Nodes retransmit packets if there was a collision

B. Sending packets that are too big does NOT affect collision detection

C. Nodes retransmit packets if an acknowledgement is not received

D. After a collision, both nodes wait a random amount of time before retransmitting a packet

E. These are all properties of Ethernet

Algorithm Quiz

1. Two main measures for the efficiency of an algorithm are 

A. Processor and memory

B. Complexity and capacity

C. Time and space

D. Data and space

2. The time factor when determining the efficiency of algorithm is measured by

A. Counting microseconds 

B. Counting the number of key operations

C. Counting the number of statements

D. Counting the kilobytes of algorithm

3. The space factor when determining the efficiency of algorithm is measured by

A. Counting the maximum memory needed by the algorithm

B. Counting the minimum memory needed by the algorithm

C. Counting the average memory needed by the algorithm

D. Counting the maximum disk space needed by the algorithm

4. Which of the following case does not exist in complexity theory

A. Best case

B. Worst case

C. Average case

D. Null case

5. The Worst case occur in linear search algorithm when 

A. Item is somewhere in the middle of the array

B. Item is not in the array at all

C. Item is the last element in the array

D. Item is the last element in the array or is not there at all

6. The Average case occur in linear search algorithm

A. When Item is somewhere in the middle of the array 

B. When Item is not in the array at all

C. When Item is the last element in the array

D. When Item is the last element in the array or is not there at all

7. The complexity of the average case of an algorithm is 

A. Much more complicated to analyze than that of worst case

B. Much more simpler to analyze than that of worst case

C. Sometimes more complicated and some other times simpler than that of worst case 

D. None or above

8. The complexity of linear search algorithm is

A. O(n)

B. O(log n)

C. O(n^2)

D. O(n log n)

9. The complexity of Binary search algorithm is 

A. O(n)

B. O(logn)

C. O(n^2)

D. O(n log n)

10. The complexity of Bubble sort algorithm is 

A. O(n)

B. O(log n)

C. O(n^2)

D. O(n log n)

11. The complexity of merge sort algorithm is

A. O(n)

B. O(log n)

C. O(n^2)

D. O(n log n)

12. The indirect change of the values of a variable in one module by another module is called

A. internal change

B. inter-module change

C. side effect

D. side-module update

13. Which of the following data structure is not linear data structure?

A. Arrays

B. Linked lists

C. Both of above

D. None of above

14. Which of the following data structure is linear data structure?

A. Trees

B. Graphs

C. Arrays

D. None of above

15. The operation of processing each element in the list is known as

A. Sorting

B. Merging

C. Inserting

D. Traversal

16. Finding the location of the element with a given value is:

A. Traversal

B. Search

C. Sort

D. None of above

17. Arrays are best data structures

A. for relatively permanent collections of data

B. for the size of the structure and the data in the structure are constantly changing

C. for both of above situation

D. for none of above situation

18. Linked lists are best suited

A. for relatively permanent collections of data 

B. for the size of the structure and the data in the structure are constantly changing

C. for both of above situation

D. for none of above situation

19. Each array declaration need not give, implicitly or explicitly, the information about

A. the name of array

B. the data type of array

C. the first data from the set to be stored

D. the index set of the array

20. The elements of an array are stored successively in memory cells because

A. by this way computer can keep track only the address of the first element and the addresses of other elements can be calculated

B. the architecture of computer memory does not allow arrays to store other than serially

C. both of above

D. none of above

21. What do you mean by Amortized Analysis?

Amortized analysis finds the average running time per operation over a worst case

sequence of operations. Amortized analysis differs from average-case performance in that

probability is not involved; amortized analysis guarantees the time per operation over

worst-case performance.

22. What are important problem types? (or) Enumerate some important types of

problems.

1. Sorting 2. Searching

3. Numerical problems 4. Geometric problems

5. Combinatorial Problems 6. Graph Problems

7. String processing Problems

23. Name some basic Efficiency classes

1. Constant 2. Logarithmic 3. Linear 4. nlogn

5. Quadratic 6. Cubic 7. Exponential 8. Factorial

24. What are algorithm design techniques?

Algorithm design techniques ( or strategies or paradigms) are general approaches to solving problems algorithmatically, applicable to a variety of problems from different areas of computing. General design techniques are:

(i) Brute force (ii) divide and conquer

(iii) decrease and conquer (iv) transform and concquer

(v) greedy technique (vi) dynamic programming

(vii) backtracking (viii) branch and bound

25. How is an algorithm’s time efficiency measured?

Time efficiency indicates how fast the algorithm runs. An algorithm’s time

efficiency is measured as a function of its input size by counting the number of times its basic operation (running time) is executeD. Basic operation is the most time consuming operation in the algorithm’s innermost loop.

26. What is Big ‘Oh’ notation?

A function t(n) is said to be in O(g(n)), denoted t(n) O(g(n)) , if t(n) is bounded aboveby some constant multiple of g(n) for all large n, i.e., if there exist some positive constantc and some nonnegative integers n0 such that

t(n) ≤ cg(n) for all n≥ n0

27. What is an Activation frame?

It is a storage area for an invocation of recursive program (parameters, local

variables, return address/value etC.). Activation frame allocated from frame stack pointed by frame pointer.

28. Define order of an algorithm

Measuring the performance of an algorithm in relation with the input size n is known as order of growth.

29. What is recursive call?

Recursive algorithm makes more than a single call to itself is known as recursive call. An algorithm that calls itself is direct recursive.An algorithm”A” is said to be indirect recursive if it calls another algorithm which in turn calls “A”.

30. What do you mean by stepwise refinement?

In top down design methodology the problem is solved in sequence (step by step)is known as stepwise refinement.

31. How is the efficiency of the algorithm defined?

The efficiency of an algorithm is defined with the components.

(i) Time efficiency -indicates how fast the algorithm runs

(ii) Space efficiency -indicates how much extra memory the algorithm needs

32. Define direct recursive and indirect recursive algorithms.

Recursion occurs where the definition of an entity refers to the entity itself.

Recursion can be direct when an entity refers to itself directly or indirect when it refers to other entities which refers to it. A (Directly) recursive routine calls itself. Mutually recursive routines are an example of indirect recursion. A (Directly) recursive data type

contains pointers to instances of the data type.

33. Which data structure allows deleting data elements from front and inserting at rear?

A. Stacks 

B. Queues 

C. Deques 

D. Binary search tree

34.    Identify the data structure which allows deletions at both ends of the list but insertion at only one end.

A. Input-restricted deque

B. Output-restricted deque

C. Priority queues

D. None of above

35.    Which of the following data structure is non-linear type?

A. Strings

B. Lists

C. Stacks

D. None of above

36.    Which of the following data structure is linear type?

A. Strings

B. Lists

C. Queues

D. All of above

37.    To represent hierarchical relationship between elements, which data structure is suitable?

A. Deque

B. Priority

C. Tree

D. All of above

38.    A binary tree whose every node has either zero or two children is called

A. Complete binary tree

B. Binary search tree

C. Extended binary tree

D. None of above

39.    The depth of a complete binary tree is given by

A. Dn = n log2n

B. Dn = n log2n+1

C. Dn = log2n

D. Dn = log2n+1

40.    When representing any algebraic expression E which uses only binary operations in a 2-tree,

A. the variable in E will appear as external nodes and operations in internal nodes

B. the operations in E will appear as external nodes and variables in internal nodes

C. the variables and operations in E will appear only in internal nodes

D. the variables and operations in E will appear only in external nodes

41.    A binary tree can easily be converted into q 2-tree

A. by replacing each empty sub tree by a new internal node

B. by inserting an internal nodes for non-empty node

C. by inserting an external nodes for non-empty node

D. by replacing each empty sub tree by a new external node

42.  When converting binary tree into extended binary tree, all the original nodes in binary tree are

A. internal nodes on extended tree

B. external nodes on extended tree

C. vanished on extended tree

D. None of above

43. The post order traversal of a binary tree is DEBFCA. Find out the pre order traversal

A. ABFCDE

B. ADBFEC

C. ABDECF

D. ABDCEF

44.  Which of the following sorting algorithm is of divide-and-conquer type?

A. Bubble sort

B. Insertion sort

C. Quick sort

D. All of above

45.  An algorithm that calls itself directly or indirectly is known as

A. Sub algorithm

B. Recursion

C. Polish notation

D. Traversal algorithm

46.  In a binary tree, certain null entries are replaced by special pointers which point to nodes higher in the tree for efficiency. These special pointers are called

A. Leaf

B. branch

C. path

D. thread

47.  The in order traversal of tree will yield a sorted listing of elements of tree in

A. Binary trees

B. Binary search trees

C. Heaps

D. None of above

48.  In a Heap tree

A. Values in a node is greater than every value in left sub tree and smaller than right sub tree

B. Values in a node is greater than every value in children of it

C. Both of above conditions applies

D. None of above conditions applies

49.  In a graph if e=[u, v], Then u and v are called

A. endpoints of e

B. adjacent nodes

C. neighbors

D. all of above

50.  A connected graph T without any cycles is called

A. a tree graph

B. free tree

C. a tree

D. All of above

51.  In a graph if e=(u, v) means

A. u is adjacent to v but v is not adjacent to u

B. e begins at u and ends at v

C. u is processor and v is successor

D. both b and c

52. If every node u in G is adjacent to every other node v in G, A graph is said to be

A. isolated

B. complete

C. finite

D. strongly connected

Digital Electronics Quiz

1. The number of level in a digital signal is:

 a) one

b) two

c) four

d) ten

 

2. A pure sine wave is :

 a) a digital signal

b) analog signal

c) can be digital or analog signal

d) neither digital nor analog signal

 

3. The high voltage level of a digital signal in positive logic is :

 a) 1

b) 0

c) either 1 or 0

 

4. A device that converts from decimal to binary numbered is called :

 a) decoder

b) encoder

c) CPU

d) convertor

 

5. K is an abbreviation used with a number of units. Thus 2K means

a) 2000 units

b) 2048 units

c) 2024 units

d) none of these

 

6. Bit is:

 a) smallest piece of electronic hardware

b) a drilling tool

c) an abbreviation for binary digit

d) the smallest number

 

7. A register is:

 a) a group of memories

b) a group of devices that store digital data

c) a chip used in computer

d) a pure silica piece used in digital system

 

8. A typical microcomputer has 65,536 registers in its memory. It will be specified as :

 a) 65,536 memory

b) 65,536 K memory

c) 64 K memory

d) 8 K memory

 

9. Nibble is :

 a) a string of 4 bits

b) a string of 8 bits

c) a string of 16 bits

d) a string of 64 bits

 

10. The high voltage level of a digital signal in negative logic is :

 a) 1

b) 0

c) either 1 or 0

 

11.Number of gates/chip in SSI :

 a) < 12

b) < 100

c) < 1000

d)  > 1000

 

11. Number of gates/chip in LSI :

 a) < 12

b) Between 12 and 99

c) < 1000

d)  > 1000

 

 

12. Number of gates/chip in VLSI :

 a) < 12

b) < 100

c) < 1000

d)  >10000

 

 

13.The electronic, magnetic and mechanical devices of a computer are known as:

 a) CPU

b) memory

c) hardware

d) radix

 

14. Ordinary electrical switch is:

 a) Analog

b) Digital

c) None of the above

 

15. Train of pulses is:

 a) Analog

b) Digital

c) None of the above

 

 

16. Octal 16 is equal to decimal:

 a) 13

b) 14

c) 15

d) 16

 

17. The binary number 101101 is equal to octal number:

 a) 65

b) 55

c) 51

d) 45

 

18. Binary number 101101 when converted to its 2’s complement will become :

 a) 0101.01

b) 0100.11

c) 0100.10

d) 0101.10

 

19. The sum of binary numbers 11111 and 00001 is given by :

 a) 100100

b) 100000

c) 100001

d) 100010

 

 

20. The hexadecimal digits are :

 a) 1 to 16

b) 1 to 9

c) 0 to 9

d) 1 to 6

 

21. A gate in which all input must be low to get a high output is called:

 a) an inverter

b) A NOR gate

c) an AND gate

d) a NAND gate

 

22. A NAND circuit with positive logic will operate as :

 a) NOR with negative logic

b) AND with negative logic

c) OR with negative logic input

d) AND with positive logic output

 

23. To implement all function of the basic logic function, is sufficient to have:

 a) OR

b) NOT

c) AND NOT

d) none of these

 

24. Which of the following ICs has only one NAND gate:

 a) 7410

b) 7420

c) 7430

d) 7447

 

25. OR operation is:

 a) X + XY

B) XY

C) X+Y

D) (X+Y) (X+Y)

 

26. AND operation is:

 a) X(X + Y )

B) XY

C) X+Y

D) (X+Y) (X+Y)

 

27. NOR operation is:

 a)X + Y

B) XY

C) X+Y

D) (X+Y) (X+Y)

 

28. NAND operation is:

 a)X + Y

B) XY

C) X+Y

D) (X+Y) (X+Y)

 

29. What is the no. of OR IC. :

 a) 7402

b) 7486

c) 7432

d) 7404

 

 

30. What is the no. of AND IC. :

 a) 7402

b) 7408

c) 7447

d) 7492

 

32. What is the no. of NOR IC. :

 a) 7402

b) 7486

c) 7447

d) 7492

 

33. What is the no. of NAND IC. :

 a) 7402

b) 7404

c) 7400

d) 7492

 

34. What is the no. of NOT IC. :

 a) 7402

b) 7486

c) 7404

d) 7492

 

35. What is the no. of EX-OR IC. :

 a) 7402

b) 7486

c) 7447

d) 7492

 

36. Which of the following ICs has three input NAND gate:

 a) 7420

b) 7430

c) 7410

d) 7474

37. Which of the following is Boolean eq. of EX-OR gate:

 a) A+B

B) A+B

C) AB

D) A B + A B

 

38. Which one is the universal gate:

 a) AND gate

b) OR gate

c) NAND gate

d) EX-OR gate

 

39. Bubbles on the gate shows

 a) active high

b) active low

c) both a and b

d) none

 

40. Which statement is verify NAND gate :

 a) if all input are high output is low

b) if all input are low output is low

c) any one n are low output is low

d) none of them

 

41. In regard to NAND gate the following four statement are made:

 1. it is equivalent to an AND gate followed by an inverter

2. if all input to it are low, the output is low

3. if all input are high, the output is low

4. NAND operation on two elements is equivalent to OR operation on them. OF thses, the only true statements are

a) 1,2

b) 1,3

c) 1,4

d) 2,4

 

42.The Gray code for number 7 is :

 a) 1100

b) 1001

c) 0100

d) 0110

 

43. The gray code for number 2 is :

 a) 0010

b) 0011

c) 1000

d) 0101

 

44. The gray code for number 6 is :

 a) 1100

b) 1001

c) 0101

d) None of the above

 

45. The Excess 3 for number 6 is :

 a) 1100

b) 1001

c) 0101

d) 0110

 

46. The excess 3 number 8 is:

 a) 1100

b) 1011

c) 0101

d) 0110

 

47. BCD numbers are obtained by :

a) converting decimal number to binary

b) converting decimal to octal number

c) each decimal digit is represented by a four bit binary

d) converting binary to decimal

 

48. (100101. ₂ is

 a) (37. ₁₀

b) (69. ₁₀

c) (41. ₁₀

d) (5. ₁₀

 

49. (1001-10) is equal to :

a) 7

b) 8₈

c) 7₄

d) 8₄

 

50. Square root of 4 is :

 a) 16₁₆

b) 2₁₀

c) 8₁₆

d) 5₁₆

 

51. In the expression A(A+B) by writing the first term A as A+0, the expression is best simplified as :

 a) A+AB

b) AB

c) A

d) A+B

 

52. A four bit number is given 1001. its one’s complement is :

 a) 1001

b) 1110

c) 0110

d) 0111

 

53. The term VLSI generally refers to a digital IC having :

 (a) more than 1000 gates

(b) more than 100 gates

(c) more than 1000 but less than 9999 gates

(d) more than 100 but less than 999 gates

 

54. The expression for sum of A, B in the half adder is given by:

 a) AB

b) A + B

c) AÐ B

d) none of these

 

55. Which expression for the sum of full adder circuit.:

 a) AB

B) A+B

C) A ® B

D) none of these

 

56. Combinational circuit has :

 a) memory

b) no memory

c) flip-flops

d) counters

 

57. The sum of 111010₂ and 11011₂ in decimal form will be

a) 65

b) 75

c) 85

d) 95

 

58. The digit 0 with carry of I is the sum of binary addition:

 a) 1 + 1

b) 1 + 0

c) 0 + 1

d) 0 + 0

 

59. Which of the following flips-flop is used as latch:

 a) TTL

b) ECL

c) CMO

d) LSI

 

 60. Which of the following flip-flops is used as latch:

 a) JK flip-flop

b) D flip-flop

c) RS flip-flop

d) T flip-flop

 

61. Which of the following circuit can be used as parallel to series converter

 a) digital counter

b) decoder

c) de-multiplexer

d) multiplexer

 

62. Which of the following ICs contain four negative edge triggered flip-flops.

 a) 7493

b) 7486

c) 7490

d) 7419

 

63. Multiplexer is :

 a) 1 input many output

b) many inputs 1 output

c) many input many output

d) one input one output

64. Demultiplexer is :

a) 1 input many output

b) many inputs 1 output

c) many input many output

d) one input one output

 

64. In 8:1 mux the no. of select lines are :

 a) 1

b) 3

c) 5

d) 32

 

65. In 16:1 mux the no. of select lines are :

 a) 6

b) 3

c) 4

d) 5

 

66. In 3: 8 decoder the no. of inputs are

 a) 8

b) 3

c) 1

d) 2

 

67. Decoder is:

 a) ) 1 input many output

b) many inputs 1 output

c) many input many output

d) one input one output

 

68. Sequential circuit has :

a) feedback

b) no feedback

c) may or may not

d) none of these

 

 

69. For a level input sequential circuit :

 a) output in a level only

b) output is in the pulse form

c) output may be a pulse or a level form

d) none of these

 

70. In a ring counter 1 for N clock pulse the scale for the counter is :

 a) N:1

b) N:2

c) N:10

d) N:100

 

71. Binary coded decimal number express each decimal digit as a :

 a) unit

b) bit

c) byte

d) nibble

 

72. How many bytes are there in 1111 1011 0111 0100 1010:

 a) 2

b) 2 ½

c) 3

d) 3 ½

 

73. For a decade counter, number of binaries required is :

a) five

b) ten

c) eight

d) two

 

74. Counter ;

 a) it counts the no. randomly

b) it counts the no. sequentially

c) both a and b

d) none of these

 

 75. What is asynchronous counter :

 a) each flip-flop has it own clock

b) all the flip-flop are combined to common clock

c) both a and b

d) none of the above

 

76. UP Counter is :

 a) it counts in upward manner

b) it count in down ward manner

c) it counts in both the direction

d) none of the above

 

77. DOWN counter is:

 a) it counts in upward manner

b) it count in down ward manner

c) it counts in both the direction

d) none of the above

 

78. Another name of Johnson counter :

 a) asynchronous counter

b) synchronous counter

c) ring counter

d) none of above

 

79. Give full form of SIPO shift registers :

 a) serial in parallel output

b) single in parallel output

c) series input peripherals output

d) none of above

 

80. Give full form of PISO shift registers :

 a) primary input secondary output

b) parallel in secondary output

c) parallel in serial out

d) none of above

 

81. Give full form of PIPO shift registers :

 a) parallel in parallel out

b) primary in parallel out

c) parallel in primary out

d) none

 

82. What is tristate shift registers :

 a) it has 3 inputs

b) it has high , low or high impedance output

c) both a and b

d) none

 

83. Which ICs belongs to tristate shift registers

 a) 7483

b) 7492

c) 74164

d) none

 

84. In bidirectional shift registers date can be shifted to:

 a) right or left

b) up or down

c) both

d) none

 

85. How many 7490 ICs are to be cascaded to count upto 999:

 a) 1

b) 2

c) 3

d) 4

86. Program counter in a digital computer :

 a) counts the number of program run in the machine

b) counts the number of times a subroutine is called

c) counts the number of times the loops are executed

d) points the memory address of the current or the next instruction to be executed

 

87. A ring counter is same as :

 a) up-down counter

b) parallel

c) shift register

d) none of these above

 

88. In a sign magnitude representation, the leading bit

 a) is a part of the number itself

b) is unity for positive

c) is always unity

d) stands for the sign

 

89. In a four variable Karnaugh map eight adjacent cells give a :

 (a) two variable term

(b) single variable term

(c) three variable term

(d) four variable term

 

90. A Karnaugh map with 4 variables has :

 (a) 2 cells

(b) 4 cells

(c) 8 cells

(d) 16 cells

 

91. In a Karnaugh map for an expression having ‘don’t care terms’ the don’t cares can be treated as :

 (a) 0

(b) 1

(c) 1 or 0

(d) none of the above

 

93. The Boolean expression A B + A B C +(A+B+C) simplifies to :

 a. A B + B C

b. AB + BC

c. A B + B C

d. A B + B C

 

94. The radix for binary system is :

 a. 0

b. 1

c. 2

d. 10

 

95. The radix for decimal system is :

 a. 0

b. 1

c. 10

d. Log, 10

 

96. The radix for octal system is :

 a. 1

b. Log, 6

c. 6

d. 8

 

97. Typical size of digital IC is about :

(a) 1 "x 1"

(b) 2 " x 2"

(c) 0.1 "X 0.1"

(d) 0.001 "x 6.001"

 

98. A digital clock uses 4 chip :

 (a) SSI

(b) LSI

(C) VLSI

(d) MSI

 

99. Digital tectionologies being used now-a-days are :

 (a) DTL and EMOS

(b) TTL, ECL, CMOS and RTL

(c) TTL, ECL and CMOS

(d) TTL, ECL. CMOS and DTL

 

100. A TTL circuit with totem pole output has :

 (a) high output impedance

(b) low output impedance

(c) very high output impedance

(d) any of above

 

101. TTL uses:

 (a) multi emitter transistors

(b) multi collector transistors

(c) multi base transistors

(d) multi emitter or multi collector transistors